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Series 1: Part 7 - The Ubiquitous Prototype (LQ043T3DX02)

Abstract

0000318In this edition, of Series 1 of the Missing Lecture Notes (MLN), the role of the prototype is investigated and its use in the design of a new revision of the LQ043T3DX02 development board is presented. This article also introduces the major components used in the new design and the project’s  preliminary budgetary requirements. Components for the prototype board are selected based on the system requirements analysis developed previously. Component selection has also been performed in order to develop useful projects, for use on the board, in the areas of computer graphics algorithm development, data acquisition and Digital Signal Processing (DSP), software development and FPGA firmware development,  Finally, a comprehensive analysis of  the power supply requirements is presented.

 

1:7.1 Introduction

An ancillary motivation in most scientific and engineering disciplines, where it is required to explore new concepts and ideas, is to minimise the cost of discovery. This is especially the case on projects where financing opportunities may be limited. No engineer, or scientist for that matter, wants to find themselves in that unenviable situation where their cost of development has becomes so high that the “development rug” is pulled from underneath their feet. That is, the project and hence the investigation of the concept is completely scratched due to escalating or unmanageable costs.

To this end, it is almost inconceivable that new ideas and concepts are not firstly demonstrated through the use of a prototype model. It is only the very brave, and probably the foolhardy engineer, that attempts to go straight from a concept, or idea, into production. The design and development of the second revision of the prototype LQ043T3DX02 development board, therefore, will be the main focus of this article.

In the last part of the series, by looking at the design, of the LQ043T3DX02 driver board, from a users’ and not an engineers view point, we have been able to put together a list of system requirements. In this part of the series our aim is to expand upon the system requirements to develop a prototype of the second generation driver board.

In a sense, to maximise the use of a  prototype board, we could regard its development from an educational perspective too. Hence, we should aim to develop a multi-functional, as well as educational,  board that can be used to expand our knowledge in all aspects of the inter-component interfaces described in the last part of the series, as well as some new ones described here.

Notice that this approach is slightly different from the approach taken in the first edition of the Missing Lecture Notes (MLN). The approach presented here provides a more practical approach to designing a LQ043T3DX02 driver board, rather than the systems approach described in the previous MLN blog. However, system analysis concepts will be strongly featured alongside the practical approach too.

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Figure 1:7-1: Prototype boards can be designed so that they are easily mated with evaluation boards, like the one shown above. Evaluation boards allow the user to evaluate components without worrying about secondary problems like PCB layout requirements, for example. However, they can be relatively expensive to buy. Evaluation boards are typically used when time is of essence. and obtaining results that are close to those that are advertised in a component's datasheet are important. [Taken from the AD8264 -Quad, 235 MHz, DC-Coupled VGA and Differential Output Amplifier Datasheet, Analog Devices, 2011.]

 

1.7.2 Prototyping The Concept

When designing a prototype development board it is not uncommon to acquire parts, for use on the  prototype, from “anything that’s available”. However, care should be taken with this approach as inevitably  most parts used on a prototype end up being used in the final product. A more reasonable method is to attempt to anticipate and purchase parts that will actually be used in the production model

However, one exception is when device package types are considered. It is often useful to use component parts with leads that can be readily probed. Quad flat pack devices are an excellent example of this.  Prototyping using Ball Grid Array (BGA) and Quad Flat No-leads (QFN) devices could limit the amount of debug and test work that could be performed. These limitations are introduced due to the inaccessibility  of device leads in these packages. One could, of course, introduce test points into the design, usually at the cost of increasing the board design space.

Sometimes, it is possible to prototype firstly with a Quad Flat Pack (QFP) device and then replace it with its BGA equivalent in the production model. However, using parts with exposed leads can usually only be used, as a substitute part,  where there is not a specific requirement for a device with a high pin count. High-pin count FPGAs are a notorious example of this.

For this particular exercise the prototype board also offers us the opportunity to develop a board that could be used for educational purposes, too, as noted previously. It is always advantageous to build a prototype that can be employed usefully, rather than look for useful things to do with it, once it has been built.

Our prototype driver board will consist of a micro-controller whose primary role will be to program, that is to configure, the FPGA at power-up. However, If we make available the micro-controller’s analog peripheral interface, the micro-controller’s analog functionality could be utilised too. For example, the ensemble could be used as a data acquisition device with the acquired data being displayed on the LQ043T3DX02 display. Using the micro-controller in this way readily provides us with the means to test our design in a “real-world” environment.

Hence, the prototype developed here could be used to explore multiple engineering concepts.  In the field of computer graphics algorithm development we will need to develop graphics display drivers in both embedded software and in the FPGA using a Hardware Description Language (HDL), which by the way will form the main part of Series 2 of the Missing Lecture Notes (MLN).

Some Digital Signal Processing (DSP) will be needed in order to analyse the acquired data, which can be performed in either the micro-controller or the FPGA.   Some computer science knowledge will be required too, in fields such as protocol development, as we attempt to transfer data between the micro-controller and FPGA or a Personal Computer (PC). Hence, if successful our prototype board will provide us with quite a bit of work and unsurprisingly the list could get longer!

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Figure 1:7-2: The major components of the second revision of the LQ043T3DX02 prototype driver board.

 

1:7.3 Component Selection

The aim of this section is to briefly introduce the components that have been selected for use on the prototype development board. In future articles, of the series, each component will be considered in depth, where a component’s interfaces and functionality, as well as example HDL firmware or C/C++ code, when  required, will be demonstrated and discussed.

When selecting devices for a new design it is not uncommon for vendor, or device, familiarity to bear strongly. This is exactly the case with the majority of the devices selected for use on this project. A block diagram of the prototype development board architecture can be seen in Figure 1, above. The other major selection criteria  used is that each devices should have 3.3V LVTTL compatible voltage levels. A cursory glance at each component’s datasheet would suggest that this is the case.

A more demanding, low-power, design may require us to select components that support 2.5V, or even lower, digital supply voltages. However, we will not use this as a selection criteria when developing this particular prototype model.

The prototype driver board consists of the major components listed in, Table 1, below.

 

Table 1:7-1: A listing of the major components of the prototype LQ043T3DX02 driver board.

Part Part No.

Function

1

Backlight driver

TPS61165

This is a high brightness LED driver capable of driving multiple LEDs in series. It is a boost converter with an integrated switch FET. Dimming of a display can be accomplished by using the supported Easyscale protocol.

2

Power supply sequencer

ADM6820

This device is used to sequence the LQ043T3DX02 display’s power supply. It is used to monitor a primary voltage and control, through the use of an external FET, a secondary power supply.  

3

64Mb Synchronous DRAM SDRAM

IS42S16400F

ISSI's 64Mb Synchronous is organized as 1,048,576 bits x 16-bit x 4-bank and will be used primarily as video RAM.

4

Altera Cyclone IV E FPGA

EP4CE6E22I7N

This particular Cyclone IV FPGA is provided in the 144-pin Enhanced Quad Flat Pack EQFP  package. It has 6,000 Logic Elements (LE).

5

8051 Microcontroller

C8051F380

This is a mixed signal System-on-a-Chip  (SOC) consisting of a 48 MIPS, pipelined 8051 compatible microcontroller.   Crucially, it has a Universal Serial Bus (USB) controller as well as the normal array of micro-controller peripherals.

6

36MHz Oscillator

7W-36.000MBB

7

4Mb SPI serial flash memory

AT25DF041A-SSH-B

Used for storing the FPGA configuration data and images.

8

Voltage Regulator

NCV565ST12T3GOSCT

1.5 A Low Dropout Linear Regulator - Adjustable used to provide 1.2, 3.3V and 5.0V.

9

Serial Peripheral Interface (SPI) for connecting to external peripherals.


1:7.4 Power Supply Requirements and Regulation

A critical stage in any electronic design system, that must be tackled sooner rather than later, is the power supply requirements of the system. How much power does each major component consume? What type and how many voltage regulators are required? What type of regulator should be used, Low Drop Out (LDO) or switching regulators? In this section we shall attempt to answer these and other related questions.

1:7.4.1 Power Supply Requirements

To begin this discussion we should start by firstly analysing our power supply requirements for the individual components. One technique that could be used to fully capture and understand the power supply requirements, of the individual components, is to describe them. This is exactly what we do in the following paragraphs.

The FPGA requires a 1.2V power supply for use as the FPGA’s core voltage supply. A 1.2V supply voltage is also required to power the FPGA’s digital Phase Lock Loop (PLL). It is not expected that these  two voltage rails will need to be isolated from each other [DS1].  A 2.5V analog power supply is required to power the analog PLLs of the FPGA [DS2]. This supply should be isolated from any 2.5V digital supplies,  either by using separate regulators with a high Power Supply Rejection Ratio (PSRR) or by using LC filters [DS3] (see figure 5).

The I/O banks of the FPGA should be powered using 3.3V LVTTL voltage levels. Hence, the SDRAM, micro-controller and graphics display should support the 3.3V LVCMOS voltage levels of the FPGA [DS4]. The SDRAM has a voltage input range of 3.3V to 3.6V and requires a nominal 3.3V supply voltage.

The TMS and TDI Joint Test Action Group (JTAG) signals, of the Cyclone IV FPGA, require pull-up resistors connected to the 2.5V analog rail, VCCA [DS5]. Also, this rail should be connected to the 2x5 way IDC, JTAG header, too. It is not yet known whether this supply is used to power a JTAG configuration device like the USB Blaster, although it is thought highly unlikely. The USB Blaster probably only uses this voltage rail to detect the presence of a JTAG chain.

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Figure 1:7-3: The power supply of the JTAG connector, used as an alternative means of configuring the FPGA, should be thought about carefully. Note that the FPGA’s 2.5V analog voltage supply rail is connected to the 2 x 5 way JTAG connector. Diagram adapted from Configuration and Remote System Upgrades in Cyclone IV Devices, Altera Corp, Nov 2011.

It has not yet been decided whether the power supply of the USB port should be used to power components on the development board [DS6]. Supplying power to the prototype board, when using power from the USB port, may be considered in future, low power designs.

The backlight controller should be powered using a 5.0V supply and a sequenced 2.5V supply should be used to feed the display’s digital circuitry. This aspect of the development has been described previously, in articles 1 - 5 of Series 1 of the MLN, and hence will not be repeated here. [DS7] .

The micro-controller supports supply voltages in the range of 2.7V to 5.25V. However, for voltages above 3.6V the use of the on-chip voltage regulators is mandatory. Although the micro-controller provides a 3.3V regulated voltage output there is no intention of using it to supply other components on the prototype board. For this application the supply voltage of the micro-controller should be 3.3V [DS8]. It should be noted that the I/O pins, of the micro-controller, are 5V compatible [DS9].

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Figure 1:7-4: Shows the distribution, between the major components, of the various voltage supply rail. For this particular design it is expected that 1.2V analog and digital, 2.5V analog and digital, 3.3V digital and 5.0V power supplies will be required.

It is always useful to draw a block diagram of the required power supplies, as in Figure 1:7-4,  as it provides a simple, but effective, means of keeping track of the various power supplies. The next question that needs to be addressed is what type of regulators should we use? Should we use linear, Low Drop Out (LDO), regulators or switching regulators?  However, before we do, we should quickly answer the question of how to provide power supply isolation between our digital and analog supplies of the same voltage.

1.7.4.2 Power Supply Isolation

In the design specification, DS3 above, our design has nudged us towards  providing separate 2.5V analog and 2.5V digital power supplies rails, which should be electrically isolated from each other. It has been suggested that amongst the different ways that this can be done, one can use separate power supply regulators with high a Power Supply Rejection Ratios (PSRR). Alternatively, the same effect can be achieved through the use of a LC (Inductor-Capacitor) pi-filter network.

The primary reason for attempting this high degree of power supply separation is to avoid the high frequency digital switching noise from coupling onto, and thereby contaminating, the analog PLL power supply. Analog circuits  are extremely susceptible to variations in supply voltage and  even small changes, in analog supply voltages,  could make their operation erroneous.

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Figure  1:7-5: (1) Analog and Digital power supplies can be separated by using voltage regulators with a high Power Supply Rejection Ration (PSRR). (2) The NCP565, like most LDO regulators, has a ripple rejection and hence Power Supply Rejection Ratio that various with frequency.  (3) A low-pass pi filter can also be used to isolated unwanted noise from digital circuits contaminating analog supply rails.  [Data taken from the NCP565/NCV565 - 1.5 A Low Dropout Linear Regulator, ON Semiconductor, Nov 2010.] 

The PSRR is the measure, in decibels (dB), of  the amount of ripple on the output voltage due to the ripple on the input voltage. Hence, it could be seen as a measure of the amount of unwanted digital noise on an analog supply. This is not the same thing as noise emanating from the internal resistors and transistors. In LDO regulators it is a measure of the output ripple compared to the input ripple over a wide frequency range and is expressed in decibels (dB) (ref 1). In, Figure 5 above, the plot of the ripple rejection vs frequency can be seen over a range of frequencies from 10Hz to 10MHz.

Whether two separate regulators should be used, to provide isolation, or whether a LC pi-filter circuit should be used depends on the sensitivity of the FPGA’s PLL analog circuit [What is the sensitivity of the FPGA’s PLL circuit? - BP]. For this application a LC pi-filter circuit should be used, since it is not anticipated that the 2.5V analog rail will be used on other, sensitive parts, of the prototype board.

1:7.4.3 Linear LDO Regulators vs Switching Regulators

So what type of regulator should we choose for our prototype board? Well, firstly we should attempt to distinguish between the two types of regulator.

When one thinks of linear LDO vs switching regulators the first parameter that springs to mind is efficiency. Switching regulators are regarded to be,  typically, more efficient than LDO regulators due to their internal regulating unit, the transistor, operating mainly in its saturation and cutoff-regions (see Figure 1:7-6) . The wastage in a switching regulator , which is usually less than  10%, results primarily from the, somewhat infrequent, transition between these two regions.

Switching regulators, which are considered to be highly efficient, can be operated as step-up, step-down or inverting regulators.

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Figure  1:7-6: Regulators consist of transistors, which are regulated in their linear, and  cutoff and saturation, regions.

LDO regulators,  on the other hand, operate by regulating a transistor in their linear region which leads to a lot of unnecessary power consumption. Hence, LDO regulators are considered to be less efficient than switching regulators with quoted efficient figures of around 80%, which is quite low. In addition to this  LDO regulators cannot be used as step up or inverting regulators.

So should we care to use LDO regulators at all? Well, before we answer this question lets firstly look at how the efficiency of an LDO regulator is determined.

Now, since the quiescent current, Iq, otherwise known as the ground current, is the difference between the input current, Ii, and the output current, Io. The  efficiency of a LDO regulator, therefore, is defined by the quiescent current, Iq and the output current, Io, along with the input and output voltages, Vo and Vi respectively.  The relation between these four parameters, which defines the efficiency, is given in equation (1).

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Firstly, consider the quiescent current, Iq, and the corresponding output voltage, Vo,  found in the electrical characteristics section of a LDO regulator, say the LT1117 as in Figure 1:7-7. Then, from the figure, for a typical input voltage, Vi, of 5.0V and an output voltage of 3.3V, the quiescent current, Iq,  is 5mA.

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Figure  1:7-7: [Data taken from the LT1117 - 800mA Low Dropout Positive Regulators Adjustable and Fixed 2.85V, 3.3V, 5V, Linear Technology Corp, 1993.]

Hence, when the output current is 750mA, the LDO’s regulators efficiency is given by equation (2)

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So if LDO regulators are so inefficient why should we consider them at all? Well there are other advantages and disadvantages to using LDO vs switching regulators which we shall briefly discuss next.

One advantage of using linear, LDO, regulators is the very clean output of their regulated DC supply, when compared to switching regulators which generate a lot of noise consisting of harmonics of their switching frequency.  Also, linear regulators tend to be cheaper than their switching regulator counterparts. Coupled with the facts that linear regulators offer high tolerances (degree of error) and PCB space savings, there are very good reasons why linear regulators are still chosen over their power-saving cousins.

An important parameter to consider when selecting LDO regulators is the regulator’s drop-out voltage. An LDO regulator’s drop out voltage is considered to be the voltage at which the regulator ceases to operate due to the input voltage approaching the regulator's output voltage.  When, for example,  the LT1117 LDO regulator (manufactured by Linear Technology) is considered, then it can be seen (Figure 7) that although typical dropout voltage is quoted as being 1.0V, the dropout voltage value actually varies with temperature and output current.

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Figure  1:7-8: Graph shows the variation in drop out voltage against output current at different temperature ranges. [Graph taken from the LT1117 - 800mA Low Dropout Positive Regulators Adjustable and Fixed 2.85V, 3.3V, 5V, Linear Technology Corp, 1993.]

To combat the power lost, when using inefficient LDO regulators, a hefty power supply will be required. For example,  we could use an off-the-shelf supply AC-DC power supply with a supply current of 5A at 12V. Like the one shown in the Figure TBD below.

 

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Figure  1:7-9: A 9V 2.5A AC/DC power supply adapter, can supply a maximum of 22.5W. Power enough for even the most demanding of applications when inefficiency linear LDO regulators are used.

 

Are there any advantages to using a a fixed output linear regulator compared to using a variable output one? Resistor tolerances tend to be better in ‘laser-trimmed’ fixed voltage parts compared to when using external resistors. Also, fixed voltage regulator part’s tend to be  cheaper.

 

1:7.5 Budgetary Pricing

So how much is this all going to cost? Well,Table 2 lists the major components anticipated for use in the prototype board and their estimated coat.


Table  1:7-2: Listing of the major components and their budgetary cost.

Part No.

Description

Cost (£)

1 TPS61165 High Brightness White LED Driver 2.47
2 ADM6820 FET Drive Simple Sequencer 2.11
3 IS42S16400F 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) Synchronous Dynamic RAM 2.24
4 EP4CE6E22 Cyclone IV FPGA 12.55
5 C8051F380 Full Speed USB Flash Micro-controller 3.82
6 36MHz Oscillator 1.84
7 AT25DF04 SPI Serial Flash Memory 0.57
8 NCV565ST x 3 .5 A Low Dropout Linear Regulator 1.52
 Total 27.14

 

1:7.6 Conclusion

In this series we have used the systems requirements, defined previously, to select the components for a demonstration prototype board. We have also considered the power supply requirements of our proposed prototype LQ043T3DX02 driver board. During this process we have considered the advantages and disadvantages of using linear LDO vs switching regultors. Before the next article in the series is published a prototype board will be designed and assembled, for use as a practical example, to continue the series.  In succeeding episodes, of the series, we will investigate each of the individual major components used to produce the prototype board.  Each component’s design specifications and interfaces will be discussed. We shall also begin writing C/C++ code or VHDL firmware, as part of a series, when required.

 

1:7.7 Design Specifications Summary

 A tabulated summary of our initial design specifications can be found in the Table 3 below.

 Table  1:7-3: Listing of some of the Design Specifications

DS1

The FPGA requires a 1.2V power supply for use as the FPGA’s core voltage. A 1.2V supply is also required to power the FPGA’s digital Phase Lock Loop (PLL). It is not expected that these  two rails will need to be isolated from each other.

DS2

A 2.5V analog power supply is required to power the analog PLLs of the FPGA.

DS3

The 2.5V analog supply should be isolated from any 2.5V digital supplies either by using separate regulators with a high Power Supply Rejection Ratio (PSRR) or by using LC filters.

DS4

the SDRAM, micro-controller and graphics display should support the 3.3V LVCMOS voltage levels of the FPGA.

DS5

The TMS and TDI Joint Test Action Group (JTAG) signals, of the Cyclone IV FPGA, require pull-up resistors connected to the 2.5V analog rail, VCCA.

DS6

It has not yet been decided whether the power supply of the USB port should be used to power components on the development board.

DS7

The backlight controller should be powered using a 5.0V supply and a sequenced 2.5V supply should be used to feed the display’s digital circuitry.

DS8

For this application the supply voltage of the micro-controller should be 3.3V.

DS9

It should be noted that the I/O pins, of the micro-controller, are 5V compatible.

 

1:7.8 References

  1. Understanding Power Supply Ripple Rejection in Linear Regulators, Analog Applications Journal, 2Q 2005.
  2. Configuration and Remote System Upgrades in Cyclone IV Devices, CYIV-51008-1.4 Altera Corp, Nov 2011.
  3. TPS61165 - High Brightness White LED Driver in 2mm x 2mm QFN and SOT-23 Packages, SLVS790B, Texas Instruments, Nov 2007.
  4. AD8264 -Quad, 235 MHz, DC-Coupled VGA and Differential Output Amplifier, Analog Devices, 2011
  5. LT1117 - 800mA Low Dropout Positive Regulators Adjustable and Fixed 2.85V, 3.3V, 5V, Linear Technology Corp, 1993.
  6. Understanding the Terms and Definitions of LDO Voltage Regulators, SLVA079, Texas Instruments, Oct 1999.
  7. NCP565/NCV565 - 1.5 A Low Dropout Linear Regulator, ON Semiconductor, Nov 2010.
  8. AT25DF041A - 4-megabit 2.3-volt or 2.7-volt Minimum SPI Serial Flash Memory, 2008 Atmel Corporation, September, 2006.
  9. ADM6819/6820 - FET Drive Simple Sequencers, Analog Devices, Aug, 2006.
  10. IS42S16400F - 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) Synchronous Dynamic RAM, Integrated Silicon Solution, Inc. (ISSI) Rev A, March 2008.
  11. C8051F380/n - Full Speed USB Flash MCU Family. Silicon Laboratories Rev. 1.0 April , 2011.
  12. EP4CE6E22, Cyclone IV Device Handbook, Altera Corp., November 2011 .



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