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Altera's DE0-NANO FPGA Development Board: A Review


0000330The DE0-Nano development and education board manufactured by Terasic is an entry level, FPGA System-on-Chip (SOC) development board, designed to showcase Altera's Cyclone IV range of FPGAs. Although this board is small in size, at TBD mm x TBD mm, it packs an almighty punch by hosting a EP4CE22F17C6N, Cyclone IV FPGA. That is, an FPGA with 22,320 Logic Elements (LE), although what having 22,320 LEs actually equates to, in terms of ASIC gates, is subject to debate.  It can be taken, for now, to mean lots of gates for most beginners and intermediate digital logic designers to experiment with. 

Practical examples using the DE0 Nano dev kit, including  DE0 Nano Serial Communication Debug Module, can be found in the tutorials section.


What immediately attracts one to this development board is its cheap price, which, hmmm, depends on where you look. Terasic Technologies advertise a price of $79 (£50.41) [$59 (£37.65) for academics] plus shipping, when bought from them directly. However, shipping costs to Europe can add significantly to the cost. I purchased the kit reviewed here from Digi Key (UK) for £60.81 + VAT at 20%.

Hence, the total cost was a grand total of £72.97. I found this price more than agreeable, especially since Digi key (UK) offered free shipping on purchases over £50.00, which this purchase qualified for.  The VAT cost was collected by the courier company  on delivery i.e Cash on Delivery (COD) which was somewhat of a surprise. When one considers that an EP4CE22F17C6N FPGA on its own retails in packets of 90 for $66.00 (£42.11) each, then the DE0 Nano is quite reasonably priced. The kit was delivered just a day or two after my order had been confirmed.

Entry Level Components

The box which the development kit was delivered in was, comparatively, absolutely enormous. When opened  it contained a much smaller Terasic branded box. Within this second box awaits the small gem and what a wonderful gem it is. If one talks about a product being worth more than its weight in gold, then the DE0 Nano fits the bill aptly.

The board consists of the standard component feature set, expected nowadays, on any entry-level FPGA development board. On the board are the usual array of devices including 32-bit Single Data Rate (SDR) SDRAM, an A/D converter, a 2Kb EEPROM, LEDs, buttons and a 50MHz oscillator. Apart from the FPGA itself, the board also includes an abundance of General Purpose Input\Output (GPIO) pins.  The 3.3V and 5.0V power supply rails are made available on the GPIO's, although we found that the 5.0V actually measured 4.3V. The drop in voltage is probably due to the power selection diodes, that allow automatic voltage input selection between the USB connector or an external power supply.



Figure: The components on the topside of the DE0 Nano development and education board. [Image taken from the DE0-Nano User Manual, Terasic Technologies]

Engineers that need to mobilise their creations, either out of design or frustration, can utilise the on-board accelerometer, which has been quite thoughtfully added. The board also contains 16Mb of serial configuration memory for storing the FPGA's configuration bit files. 

The Digital Accelerometer - ADXL-345

The ADXL345 is a 3-axis accelerometer with a 13-bit resolution at +-16g. Typically, it is used to measure the static acceleration of gravity in tilt-sensing applications, as well as dynamic acceleration resulting from motion or shock. Its high resolution (4mg/LSB) enables resolution of inclination changes of as little as 0.25°.

Apart from supporting both I2C and SPI interfaces, it has several special sensing functions. Activity and inactivity sensing detects the presence or lack of motion. It can also be used to detect motion when the acceleration on any axis exceeds a user-set level. Provision is also provided for tap sensing and it detects single and double taps. Free-fall sensing, that detects if the device is falling, is also provided for. All of these sensing functions can be mapped to interrupt output pins. An integrated 32 level FIFO can be used to store data to minimize host processor intervention. Breakout boards for this device alone can retail for as much as £20 ($31.34).


The Analog-to-Digital Converter (ADC) - ADC128S022

The ADC found on the DEO Nano is the ADC128S022 by TI (formerly National Semiconductor). It is a low-power, eight-channel, CMOS, 12-bit analog-to-digital converter specified for conversion throughput rates of 500 KSPS to 1 MSPS. It can be configured to accept up to eight input signals at inputs IN0 through to IN7. The throughput rate reduces significantly when all inputs are configured as they are multiplexed. Key specifications of the ADC include a DNL of +1.5/-0.9 LSB (max) and an INL of +-1.2 LSB (max). When supplied with 3V the device consumes about 10.7mW of power.



Built-in USB Blaster and External Power Supply

Like most modern FPGA development boards this one has a built-in USB blaster for device configuration. The USB Blaster can also be used by applications to  communicate with designs running on the FPGA, all be it, at ridiculously slow, serial bit rates. However, when one considers the cost of a standalone USB Blaster, then it is not to be scoffed at. However, the USB port cannot be used to communicate directly with user logic within the FPGA. 


Figure: The built-in USB Blaster allows the DEO-Nano to be used with Altera's Quartus Design Suite.

As the design can be powered using the USB port it does mean that the board can be tested by simply plugging it into a host USB port of a PC. Seeing the default flashing LED test program  is quite reassuring when you do. The board also accepts an external power supply through an external two way, 2.54mm,   straight header. It could be beneficial to purchase some crimp housing, 2.54mm PCB headers and crimps (see the image below)  in anticipation of connecting a 5.0V external power supply to the board. 


Figure: 2.54mm PCB  crimps, crimp housing and  headers.


To successfully develop and sell a product it is the small touches that really count and the DEO-Nano has many of them. For example, the perspex protector board covering. This small, but important, touch means that the board can be left on a desktop for months upon end without gathering the usual layers of dust that development boards tend to acquire. 

This is a fantastic development board and sooner rather than later hobbyist projects will begin to emerge that will fully utilise it, further increasing its popularity.  However, to fully utilise this board one must think of expansion. Not expansion in terms of world domination, but in terms of fully utilising the available GPIO pins to expand the DE0 Nano into a delightfully robust development kit. 

For hobbyists looking for a reasonably priced, entry level FPGA development board, the DE0-Nano is highly recommended.

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